A Digital Vision Chip for Early Feature Extraction with Rotated Template-Matching CA

Masayuki Ikebe; Tetsuya Asai

doi:10.20965/jrm.2005.p0372

single-rb.php

« previous

JRM Vol.17 No.4 pp. 372-377

doi: 10.20965/jrm.2005.p0372

(2005)

Paper:

Views over last 60 days: 421

A Digital Vision Chip for Early Feature Extraction with Rotated Template-Matching CA

Masayuki Ikebe, and Tetsuya Asai

Graduate School of Information Science and Technology, Hokkaido University, Kita 14, Nishi 9, Kita-ku, Sapporo 060-0814, Japan

Received:

December 17, 2004

Accepted:

April 1, 2005

Published:

August 20, 2005

Keywords:

cellular automata, high-speed image processing, rotated erosion, CMOS image sensor, feature extraction

Abstract

We discuss a cellular-automata (CA) LSI core that extracts early features of objects in images, such as sizes and skeletons. A CMOS-image sensor with a CA core enables high-speed image processing. We propose an efficient CA algorithm based on rotated template matching. Each cell circuit in the proposed CA is implemented by a digital circuit, and transistors in each cell circuit number 198 in full customized design. The CA LSI consists of a large number of cell circuits operating in parallel to ensure fast, efficient object extraction as the number of cells increases. With a 0.25μm CMOS process, the total area of each cell circuit is 30×30μm². Simulation results indicated that image processing with 320×240 cells operates at up to 25MHz.

Cite this article as:

M. Ikebe and T. Asai, “A Digital Vision Chip for Early Feature Extraction with Rotated Template-Matching CA,” J. Robot. Mechatron., Vol.17 No.4, pp. 372-377, 2005.

Data files:

References

[1] K. Preston, and M. Duff, “Modern cellular automata,” Plenum Press, 1984.
[2] T. Toffoli, and N. Margolus, “Cellular automata machines,” MIT Press, 1987.
[3] J. Serra, “Image Analysis and Mathematical Morphology,” Academic Press, 1982.
[4] H. Harrer, and J. A. Nossek, “Discrete-Time Cellular Neural Networks,” Int. J. Circ. Th. Appl., Vol.20, pp. 453-467, 1992.
[5] T. Sunayama, M. Ikebe, T. Asai, and Y. Amemiya, “Cellular νMOS circuits performing edge detection with difference-of-Gaussian Filters,” Japanese Journal of Applied Physics, Vol.39, No.4B, pp. 399-407, 2000.
[6] R. Kagaya, M. Ikebe, T. Asai, and Y. Amemiya, “On-chip fixedpattern-noise canceling with non-destructive intermediate readout circuitry for CMOS active-pixel sensors,” WSEAS Transactions on Circuits and Systems, Vol.3, No.3, pp. 477-479, 2004.
[7] A. Namiki, T. Komuro, and M. Ishikawa, “High Speed Sensory-Motor Fusion Based on Dynamics Matching,” Proceedings of the IEEE, Vol.90, No.7, pp. 1178-1187, 2002.
[8] M. J. E. Golay, “Hexagonal parallel pattern transformations,” IEEE Trans. Comput., Vol.C-18, pp. 733-740, 1969.
[9] C. Arcelli, L. Cordella, and S. Levialdi, “Parallel thinning of binary pictures,” Electron. Lett., Vol.11, pp. 148-149, 1975.
[10] C. J. Hilditch, “Liner skeletons from square cupboards,” In: B. Melter, D. Michie (editors), “Machine intelligence,” Edinburgh Univ. Press, p. 403, 1969.
[11] R. Stefanelli, and A. Rosenfeld, “Some parallel thinning algorithms for digital pictures,” J. ACM, Vol.18, pp. 255-264, 1971.
[12] H. Tamura, “General comments on thinning methods,” Proc. Reliability Soc. PRL 75, 1975.
[13] G. M. Carter, J. M. Chaiken, and E. Ignall, “Response areas for two emergency units,” Operations Research, Vol.20, pp. 571-594, 1972.
[14] F. K. Hwang, “An O(nlogn) algorithm for rectilinear minimal spanningtrees,” Journal of the ACM, Vol.26, pp. 177-182, 1979.
[15] D. T. Lee, “Two dimensional Voronoi Diagram in the L_p-metric,”Journal of the ACM, Vol.27, pp. 604-618, 1980.
[16] D. T. Lee, and C. K. Wong, “Voronoi Diagram in L₁ (L_∞) metrics with 2-dimensional storage applications,” SIAM Journal of Computing,Vol.9, pp. 200-211, 1980.

This article is published under a Creative Commons Attribution-NoDerivatives 4.0 Internationa License.

[1] [1] K. Preston, and M. Duff, “Modern cellular automata,” Plenum Press, 1984.

[2] [2] T. Toffoli, and N. Margolus, “Cellular automata machines,” MIT Press, 1987.

[3] [3] J. Serra, “Image Analysis and Mathematical Morphology,” Academic Press, 1982.

[4] [4] H. Harrer, and J. A. Nossek, “Discrete-Time Cellular Neural Networks,” Int. J. Circ. Th. Appl., Vol.20, pp. 453-467, 1992.

[5] [5] T. Sunayama, M. Ikebe, T. Asai, and Y. Amemiya, “Cellular νMOS circuits performing edge detection with difference-of-Gaussian Filters,” Japanese Journal of Applied Physics, Vol.39, No.4B, pp. 399-407, 2000.

[6] [6] R. Kagaya, M. Ikebe, T. Asai, and Y. Amemiya, “On-chip fixedpattern-noise canceling with non-destructive intermediate readout circuitry for CMOS active-pixel sensors,” WSEAS Transactions on Circuits and Systems, Vol.3, No.3, pp. 477-479, 2004.

[7] [7] A. Namiki, T. Komuro, and M. Ishikawa, “High Speed Sensory-Motor Fusion Based on Dynamics Matching,” Proceedings of the IEEE, Vol.90, No.7, pp. 1178-1187, 2002.

[8] [8] M. J. E. Golay, “Hexagonal parallel pattern transformations,” IEEE Trans. Comput., Vol.C-18, pp. 733-740, 1969.

[9] [9] C. Arcelli, L. Cordella, and S. Levialdi, “Parallel thinning of binary pictures,” Electron. Lett., Vol.11, pp. 148-149, 1975.

[10] [10] C. J. Hilditch, “Liner skeletons from square cupboards,” In: B. Melter, D. Michie (editors), “Machine intelligence,” Edinburgh Univ. Press, p. 403, 1969.

[11] [11] R. Stefanelli, and A. Rosenfeld, “Some parallel thinning algorithms for digital pictures,” J. ACM, Vol.18, pp. 255-264, 1971.

[12] [12] H. Tamura, “General comments on thinning methods,” Proc. Reliability Soc. PRL 75, 1975.

[13] [13] G. M. Carter, J. M. Chaiken, and E. Ignall, “Response areas for two emergency units,” Operations Research, Vol.20, pp. 571-594, 1972.

[14] [14] F. K. Hwang, “An O(nlogn) algorithm for rectilinear minimal spanningtrees,” Journal of the ACM, Vol.26, pp. 177-182, 1979.

[15] [15] D. T. Lee, “Two dimensional Voronoi Diagram in the L_p-metric,”Journal of the ACM, Vol.27, pp. 604-618, 1980.

[16] [16] D. T. Lee, and C. K. Wong, “Voronoi Diagram in L₁ (L_∞) metrics with 2-dimensional storage applications,” SIAM Journal of Computing,Vol.9, pp. 200-211, 1980.