Paper:
Design and Implementation of Responsive Processor for Parallel/Distributed Control and Its Development Environments
Nobuyuki Yamasaki*,**
*Keio University, 3-14-1, Hiyoshi, Kohoku-ku, Yokohama, Kanagawa 223-8522, Japan
**National Institute Advanced Industrial Science and Technology, 1-1-1, Umezono, Tsukuba, Ibaraki 305-8568, Japan
In this paper, Responsive Processor for parallel/distributed real-time processing, which can control various electronic control systems, is designed and implemented. Responsive Processor is integrates many functions into an ASIC chip, such as a RISC processing core (SPARC), Responsive Links that realize realtime communication, many peripheral functions including SDRMI/Fs, DMAC, PCI, USB, SIO, PIP, timers, pulse counters, PWM generators, A/D converters, D/A converters, etc. Its control boards and development environments are also designed and implemented.
This article is published under a Creative Commons Attribution-NoDerivatives 4.0 Internationa License.
Copyright© 2001 by Fuji Technology Press Ltd. and Japan Society of Mechanical Engineers. All right reserved.