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Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction
Hideki Kazama, Masanori Hariyama, and Michitaka Kameyama
Graduate School of Information Sciences, Tohoku University, Aoba 05, Aramaki, Aoba-ku, Sendai 980, Japan
Received:February 19, 2000Accepted:July 8, 2000Published:October 20, 2000
Keywords:Stereo vision, Ball extraction, Memory capacity minimization, High-level synthesis
Abstract
In real-world applications, it is important to develop high-performance special-purpose processors that execute intelligent processing with a tremendous amount of input data. A robot that catches a moving ball is a typical example of real-world applications. In acquisition of 3-D coordinates of a ball trajectory, ball extraction is the most time-consuming processing. This paper presents an optimal design of a ball extraction VLSI processor. To reduce a chip area under a time constraint, minimization of memory capacity is achieved based on an immediate output generation scheduling.
Cite this article as:H. Kazama, M. Hariyama, and M. Kameyama, “Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction,” J. Robot. Mechatron., Vol.12 No.5, pp. 534-540, 2000.Data files:
Copyright© 2000 by Fuji Technology Press Ltd. and Japan Society of Mechanical Engineers. All right reserved.
