Design of a Parallel Processor for Visual Feedback Control Based on the Reconfiguration of Word Length
Yoshichika Fujioka and Nobuhiro Tomabechi
Department of Electrical Engineering, Hachinohe Institute of Technology, 88-1, Obiraki, Myo, Hachinohe 031, Japan
In the sensor feedback control of intelligent robots, the delay time must be reduced for a large number of multioperand multiply-additions. To reduce the delay time for the multiply-additions, switch circuit is used to change the direct connection between the multipliers and adders, so that the overhead in data transfer is reduced. To change the word-length of the multi-operand multiply-adders, in addition, the switches are also provided in multipliers and adders. By changing to the short wordlength, the numbers of multiplier and adders can be increased. The performance evaluation shows that the delay time for visual feedback control becomes about 6 times faster than that of a parallel processor approach using conventional digital signal processor (DSPs).