Evaluation of an OpenCL-Based FPGA Platform for Particle Filter
Shunsuke Tatsumi*, Masanori Hariyama*, and Norikazu Ikoma**
*Graduate School of Information Sciences, Tohoku University
6-6-05 Aramaki Aza Aoba, Aoba, Sendai 980-8579, Japan
**Faculty of Engineering, Nippon Institute of Technology
4-1 Gakuendai, Miyashiro-machi, Minamisaitama-gun, Saitama 345-8501, Japan
Particle filter is one promising method to estimate the internal states in dynamical systems, and can be used for various applications such as visual tracking and mobile-robot localization. The major drawback of particle filter is its large computational amount, which causes long computational-time and large power-consumption. In order to solve this problem, this paper proposes an Field-Programmable Gate Array (FPGA) platform for particle filter. The platform is designed using the OpenCL-based design tool that allows users to develop using a high-level programming language based on C and to change designs easily for various applications. The implementation results demonstrate the proposed FPGA implementation is 106 times faster than the CPU one, and the power-delay product of the FPGA implementation is 1.1% of the CPU one. Moreover, implementations for three different systems are shown to demonstrate flexibility of the proposed platform.
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