Development of Image Recognition Processor Based on Configurable Processor
Takashi Miyamori*, Jun Tanabe*, Yasuhiro Taniguchi**,
Kenji Furukawa**, Tatsuo Kozakaya**, Hiroaki Nakai**,
Yukimasa Miyamoto*, Ken-ichi Maeda**,
and Masataka Matsui*
*SoC Research & Development Center, Semiconductor Company, Toshiba Corporation, 580-1 Horikawa-cho, Saiwai-ku, Kawasaki 212-8520, Japan
**Corporate Research & Development Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan
We developed an image recognition processor, “Visconti,” based on a configurable processor. Three VLIW processors that execute three instructions in parallel are integrated into a single chip with peripheral modules such as video I/Os and an SDRAM controller. Each VLIW processor has a RISC processor core and a VLIW coprocessor dedicated to image processing. The coprocessor executes SIMD instructions such as 8-parallel byte. Visconti was fabricated using 0.13μm CMOS technology, operates at 150MHz, and consumes about 1W. We present actual application examples of Visconti, onboard surveillance for automobiles and face recognition. Compared to cases in which only the processor core is used, execution speed per one processor increases about 16 times for onboard surveillance and about five times per three processors for face recognition. These applications can be processed in real time.
-  W. Raab et al., “A 100-GOPS Programmable Processor for Vehicle Vision Systems,” IEEE Design & Test of Computers, pp. 8-15, Jan.-Feb. 2003
-  S. Kyo et al., “A 51.2 GOPS Scalable Video Recognition Processor for Intelligent Cruise Control Based on a Linear Array of 128 4-Way VLIW Processing Elements,” IEEE International Solid-State Circuits Conference (ISSCC) digest of technical papers, pp. 48-49, 2003.
-  T. Miyamori, “A Configurable and Extensible Media Processor,” Embedded Processor Forum, 2002.
-  http://www.MePcore.com/
-  A. Peleg, and U. Weiser, “MMX technology Extension to the Intel Architecture,” IEEE Micro, pp. 42-50, Aug. 1996.
-  A. Mizuno, “Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture,” IEEE Int. Conf. on Computer Design, pp. 2-7, Sep. 2002.
-  J. Tanabe et al., “Visconti: Multi-VLIW Image Recognition Processor based on Configurable Processor,” Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp. 185-188, 2003.
-  Y. Kondo et al., “A 4GOPS 3Way-VLIW Image Recognition Processor Based on a Configurable Media-processor,” IEEE International Solid-State Circuits Conference (ISSCC) digest of technical papers, pp. 148-149, 2001.
-  H. Takano et al., “A 4GOPS 3Way-VLIW Image Recognition Processor Based on a Configurable Media-processor,” IEICE Trans. Electron., Vol.E85-C, No.2, pp. 347-351, Feb. 2002.
-  Y. Taniguchi, and K. Okamoto, “Automatic Rear and Side Surveillance System using Image Processing,” Proc. of 6th World Congress on Intelligent Transport Systems, 1999.
-  H. Hattori, “Stereo for 2D Visual Navigation,” Proc. IEEE Intelligent Vehicles Symposium, pp. 31-38, 2000.
-  H. Nakai et al., “A Practical Stereo Scheme for Obstacle Detection in Automotive Use,” Proc. of Int. Conf. on Pattern Recognition (ICPR), 2004.
-  K. Furukawa et al., “Onboard Surveillance System for Automobiles Using Image Processing LSI,” IEEE Intelligent Vehicles Symposium, pp. 555-559, 2004.
-  O. Yamaguchi, K. Fukui, and K. Maeda, “Face Recognition Using Temporal Image Sequence,” Proc. of 3rd IEEE Int. Conf. on Automatic Face and Gesture Recognition, pp. 318-323, 1998.
-  T. Kozakaya et al., “Development of a Face Recognition System on an Image Processing LSI chip,” Proc. of CVPR Workshop on Face Processing in Video (FPIV’04), 2004.
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