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JRM Vol.17 No.4 pp. 428-436
doi: 10.20965/jrm.2005.p0428
(2005)

Paper:

Implementation of Face Recognition Processing Using an Embedded Processor

Hiroyuki Kondo*, Masami Nakajima*, Miroslaw Bober**,
Krzysztof Kucharski***, Osamu Yamamoto*,
and Toru Shimizu****

*System Core Technology Div., Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

**Information Technology Centre Europe B.V. (ITE) Visual Information Laboratory, 20 Frederick Sanger Rd, Surrey Research Park, Guildford, Surrey, GU12SE, U.K.

***Institute of Radioelectronics, Warsaw University of Technology, ul. Nowowiejeska 15/19, 00-665 Warsaw, Poland

****System Core Technology Div., Renesas Technology Corp., 5-22-2 Josuihon-cho, Kodaira, Tokyo 187-0022, Japan

Received:
December 1, 2004
Accepted:
March 30, 2005
Published:
August 20, 2005
Keywords:
embedded processor, multiprocessor, face recognition processing
Abstract

Embedded processors are conventionally difficult to use in face recognition in the security and robotic fields because of the tremendous amount of processing required. We implemented face recognition processing with a multicore based embedded processor having low power consumption and high performance. The single-chip multiprocessor is manufactured using a 0.15μm process with two M32R cores, 512KB of SRAM, and peripheral circuits integrated on a single-chip. It has a power supply voltage of 1.5V, a frequency of 600MHz, and power consumption of 800mW.

Cite this article as:
Hiroyuki Kondo, Masami Nakajima, Miroslaw Bober,
Krzysztof Kucharski, Osamu Yamamoto, and
and Toru Shimizu, “Implementation of Face Recognition Processing Using an Embedded Processor,” J. Robot. Mechatron., Vol.17, No.4, pp. 428-436, 2005.
Data files:
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