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JRM Vol.11 No.3 pp. 173-182
doi: 10.20965/jrm.1999.p0173
(1999)

Paper:

Algorithm and Design of an Intelligent Digital Integrated Circuit for a Watermelon Harvesting Robot

Yusuke Tokunaga*, Toshihide Hakukawa**, and Takahiro Inoue*

*Dept. of Electrical and Computer Engineering, Kumamoto University, 2-39-1 Kurokami, Kumamoto-shi, 860-8555 Japan

**Teradyne K.K. Kumamoto Facility, 273-13 Heisei, Ohza-Takaono, Ohzu-cho, Kikuchi-gun, Kumamoto, 869-1232 Japan

Received:
February 15, 1999
Accepted:
March 23, 1999
Published:
June 20, 1999
Keywords:
noise reduction, coarsening, edge detection, noise filtering, pattern recognition, FPGA
Abstract

We propose an algorithm and design of an intelligent digital integrated circuit for recognition of circular patterns in a binary image based on template matching using a modified matching degree. The proposed system consists of a preprocessor #1 (noise reduction, coarsening, and edge detection), a preprocessor #2 (noise filtering and location parameter detection), and a circular pattern recognition block. The proposed system is implementable onto field programmable gate arrays (FPGAs) and forming part of the vision system for a watermelon harvesting robot. Functional verification, logic synthesis, and implementation are detailed for the FPGA circular pattern recognition block.

Cite this article as:
Yusuke Tokunaga, Toshihide Hakukawa, and Takahiro Inoue, “Algorithm and Design of an Intelligent Digital Integrated Circuit for a Watermelon Harvesting Robot,” J. Robot. Mechatron., Vol.11, No.3, pp. 173-182, 1999.
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Last updated on Oct. 15, 2021