Paper:
Language: English:

Hardware Feedback Self-Organizing Map and its Application to Mobile Robot Location Identification

Hiroomi Hikawa^, Kazutoshi Harada^, and Takenori Hirabayashi^**

^* Dept. of Computer Science and Intelligent Systems, Oita University, Oita 870-1192, Japan
^** Shinko Electric Co., Ltd., Minato-ku, Tokyo 105-8564, Japan

Received: March 15, 2007

Accepted: May 23, 2007

Keywords: hardware, feedback SOM, mobile robot, location identification, FPGA

Journal ref: Journal of Advanced Computational Intelligence and Intelligent Informatics, Vol.11, No.8 pp. 937-945, 2007

Abstract

We propose new hardware architecture for the self-organizing map (SOM) and feedback SOM (FSOM). Due to the parallel structure in the SOM and FSOM algorithm, customized hardware considerably speeds-up processing. Proposed hardware FSOM identifies the location of a mobile robot from a sequence of direction data. The FSOM is self-trained to cluster data to identify where the robot is. The proposed FSOM design is described in C and VHDL, and its performance is tested by simulation using actual sensor data from an experimental mobile robot. Results show that the hardware FSOM succeeds in self-learning to find the robot’s location. The hardware FSOM is estimated to process 6,992 million weight-vector elements per second.

Reference

[1] T. Kohonen, “Self-Organizing Maps,” 3rd, ser. Springer Series in Information Sciences 30, New York, Springer-Verlag, 2001.

[2] R. Mann and S. Haykin, “A parallel implementation of Kohonen feature maps on the warp systolic computer,” Proc. of IJCNN1990, Vol.2, pp. 84-87, 1990.

[3] D. C. Hendry, A. A. Duncan, and N. Lightowler, “IP Core Implementation of a Self-Organizing Neural Network,” IEEE Trans. on Neural Networks, Vol.14, No.5, pp. 1085-1096, Sep. 2003.

[4] H. Tamukoh, T. Aso, K. Horio, and T. Yamakawa, “Self-Organizing Map Hardware Accelerator System and its Application to Realtime Image Enlargement,” Proc. of IJCNN2004, pp. 2683-2687, Sep. 2003.

[5] H. Hikawa, “A New Pulse Mode Self Organizing Map Hardware with Digital Phase Locked Loops,” Proc. of IJCNN2005, pp. 2855-2860, 2005.

[6] H. Hikawa, “FPGA implementation of self organizing map with digital phase locked loops,” Neural Networks, Vol.18, No.5-6, pp. 514-522, Jun.-Jul. 2005.

[7] K. Horio and T. Yamakawa, “Feedback Self-Organizing Map and Its Application to Spatio-Temporal Pattern Classification,” Int. Journal of Computational Intelligence and Applications, Vol.1, pp. 1-18, 2001.

[8] H. Wakuya, H. Harada, and K. Shida “An architecture of selforganizing map for temporal signal processing and its application to a Braille recognition task,” IEICE Transactions on Information and Systems, Vol.E87-D, No.3, p.796, Mar. 2004.

[9] R. Chatila, “Deliberation and reactivity in autonomous mobile robots,” Robotics and Autonomous Systems, Vol.16, pp. 197-211, 1995.

[10] B. Mailachalam and T. Srikanthan “Area-time issues in the VLSI implementation of self organizing map neural networks,” Microprocessors and Microsystems, Vol.26, No.9-10, pp. 399-406, 2002.

[11] M. Jordan, “Attractor dynamics and parallelism in a connectionist sequential machine,” Proc. of Eighth Annual Conf. of the Cognitive Science Society, pp. 513-546, 1986.